1. Field of the Invention
The present invention relates to a method of crystallizing an amorphous silicon thin film transistor and a method of fabricating a polycrystalline thin film transistor using the same. More particularly, the present invention relates to a method of crystallizing an amorphous silicon thin film transistor by using a metal silicide seed induced crystallization (SIC) process that can crystallize an amorphous silicon thin film without metal contamination by using dot-shaped metal silicide seeds as crystallization heat-treatment nuclei during performing a crystallization heat-treatment process, and a method of fabricating a polycrystalline thin film transistor using the same.
2. Description of the Related Art
Thin film transistors (TFTs) are used to select pixels in display devices, such as liquid crystal displays (LCDs) or active matrix organic light emitting diode displays (AMOLEDs), in which each of the thin film transistors (TFTs) is ordinarily formed by depositing amorphous silicon on a transparent substrate such as glass or quartz, forming a gate and a gate electrode, injecting impurities into a source region and drain region to then perform an annealing treatment and activating the source and drain regions to then form an insulating layer.
Active layers that form a source region, a drain region, and a channel region of a thin film transistor are ordinarily formed by depositing amorphous silicon on a transparent substrate such as glass by using a chemical vapor deposition (CVD) method.
However, an amorphous silicon layer that is directly deposited on the substrate by such a chemical vapor deposition (CVD) method, has a low electron mobility. The display devices using thin film transistors require a fast operation speed and are miniaturized. Accordingly, an integration of driving integrated circuits (ICs) becomes large and an aperture ratio of pixel areas is reduced. Therefore, there is a need to increase an electron mobility of silicon films, and thus form a drive circuit together with a pixel thin film transistor (TFT), and increase an aperture ratio of individual pixels.
In addition, the current display market has a trend that is changing from LCDs to AMOLEDs. The AMOLED display devices need switching transistors that can operate at high speed in order to select and drive pixels at high speed. These high-speed switching transistors may be implemented by using polycrystalline silicon thin film transistors with a high electron mobility.
Therefore, polycrystalline silicon thin film transistors with the high electron mobility are essential elements in the AMOLED display devices. For this, methods of crystallizing the amorphous silicon thin film transistors are needed. There are a solid phase crystallization method, an excimer laser crystallization method using excimer laser, a metal-induced crystallization method, etc., as the well-known current crystallization methods.
First, the solid phase crystallization (SPC) method is a method of annealing amorphous silicon layers at temperatures of about 600° C. or less that is a temperature at which glass that forms a substrate is deformed, over several hours to several tens of hours. The SPC method requires a heat-treatment process for long periods of time, so the productivity is low. In addition, when an area of the substrate is large, there is a problem that, the substrate may be deformed during the heat-treatment process for a long time even at temperatures of about 600° C. or less
The excimer laser crystallization (ELC) method is a method of instantaneously crystallizing amorphous silicon layers by injecting excimer laser onto the amorphous silicon layers to thus cause a high temperature locally to happen for a very short period. The ELC method has the technical difficulties in precisely controlling injection of the laser light, and allows only one substrate to be processed at a time. Accordingly, there is a problem that the productivity is lower than a case of batch-processing several substrates simultaneously in a furnace.
In order to overcome the disadvantages of the conventional crystallization methods of crystallizing the amorphous silicon layers, a phenomenon that a phase change is induced from amorphous silicon to crystalline silicon at low temperatures in the case that a metal such as nickel, gold, and aluminum is made to be in contact with amorphous silicon, or the metal is injected into silicon, has been used. Such a phenomenon is called crystallization induced metal (MIC). When thin film transistors are fabricated by using the MIC phenomena, metals remain in the crystalline silicon that forms active layers of the thin film transistors. In particular, there is a problem that current leakage may be caused in the channel regions of the thin film transistors.
In recent years, instead of causing meals to directly induce the phase change of the silicon as in the MIC method, methods of crystallizing silicon layers using a metal induced lateral crystallization (MILC) phenomenon in which silicides generated by reaction of metal and silicon continue to propagate laterally and to sequentially induce crystallization of amorphous silicon, have been proposed (S. W. Lee & S. K. Joo, IEEE Electron Device Letter, 17(4), p. 160, 1996).
In particular, metals such as nickel and palladium are known as metals causing the MILC phenomenon to occur. In the case of crystallizing amorphous silicon layers by using the MILC phenomenon, a silicide interface including metals moves laterally as the phase change of the amorphous silicon is propagated. Accordingly, metal components used to induce crystallization do not almost remain in the poly crystalline silicon layer crystallized by the MILC phenomenon. As a result, the crystallization method using the MILC phenomenon does not greatly influence upon the characteristics of the current leakage and the other behaviors of the transistors having the active layers formed of the polycrystalline silicon layers. In addition, in the case of using the MILC phenomenon, crystallization of silicon may be induced at a relatively low temperature of 550° C. or less, to thereby provide an advantage that several substrates may be crystallized simultaneously without any damage of the substrates by using a furnace.
The conventional crystallization methods using the MILC phenomenon perform MIC/MILC crystallization through a heat-treatment process after having deposited crystallization induced metals in a source/drain region, and thus has a problem that electrical properties fall due to high metal contamination of a channel region by a continuous inflow of a catalytic metal during performing a crystallization heat-treatment process.
Moreover, the MILC method may cause the remaining metals that are not deposited in the source/drain region and do not act as a crystallization catalyst to be likely to be oxidized after being heat-treated, and thus may have the difficulties that the remaining metals may not be completely removed even in the process of removing the remaining metals.
In addition, there is a big limitation in order to commercialize the MILC technology, in other words, in the case of forming a gate insulating layer and a gate electrode on an active layer area, after having processed crystallization for the active layer area made of amorphous silicon in advance, a glass substrate may be shrunk during performing the crystallization heat-treatment process, to thereby cause a problem that it is difficult to perform a subsequent gate and wiring formation process. In order to overcome these problems, the conventional technology performs a process of compressing a glass substrate as a first process. However, the compression process of the glass substrate may be applied in a small-size display, but may not be applied in a large-area substrate because of deformation of the glass substrate. As a result, the above-described conventional technologies do not cause any problem to occur in the manufacture of small-size AMOLEDs, but may cause problems that it is difficult to be applied in the manufacture of large-area AMOLEDs.
Meanwhile, there are two reasons that the currently developed MILC technologies may not be applied to the AMOLEDs.
The first reason is the leakage current. Light-emitting organic materials may respond to even a very low current to emit light in the AMOLEDs. Thus, it is required to lower the leakage current in the AMOLEDs as low as possible. However, TFTs produced by the conventional MILC technologies show a leakage current of 1×10−10 Amp or higher.
The second reason is uniformity of electrical characteristics that occur because a lot of crystallization induced metals are trapped in a channel region. When a drain voltage is increased in the MILC process, the leakage current increases because of a lot of the trapped metals. In the case that a crystallization induced metal such as Ni is trapped in the polycrystalline silicon, a leakage current is induced by forming a trap level, in a silicon band gap. That is, as the drain voltage becomes high, a leakage current is generated from a trap state that, exists deep in the band gap.
A conventional method of crystallizing an amorphous semiconductor thin film is disclosed in Korean Patent Registration No. 10-0653853 (28 Nov. 2006).
The conventional amorphous semiconductor thin film crystallization method disclosed in the Korean Patent Registration No. 10-0653853, includes the steps of: forming a pair of non-metallic seeds at a predetermined distance from each other on a transparent insulating substrate in order to induce crystallization of the amorphous semiconductor thin film; depositing the amorphous semiconductor thin film, on the entire surface of the substrate; and thermally treating the substrate and epitaxially growing a polycrystalline semiconductor thin film from the non-metallic seeds, to thereby crystallize the amorphous semiconductor thin film.
The conventional amorphous semiconductor thin film crystallization method disclosed in the Korean Patent Registration No. 10-0653853, performing a patterning process of patterning primary amorphous silicon only in a source/drain region in order to obtain metal silicide seeds to thus crystallize the patterned primary amorphous silicon through a crystallization induced metal, to then deposit and crystallize secondary amorphous silicon by using the crystallized primary amorphous silicon as the seeds. As a result, the conventional amorphous semiconductor thin film crystallization method should perform an additional etching process, two amorphous silicon deposition processes, and two heat-treatment processes, to thereby cause the manufacturing process to be complicated and increase the manufacturing cost.
In addition, in the conventional amorphous semiconductor thin film crystallization method disclosed in the Korean Patent Registration No. 10-0653853, a photoresist is formed with a thickness of 0.2 to 1.5 um as a sacrificial organic membrane, and then the sacrificial organic membrane is removed by using an ashing method, a strip method, a dry etching method, or a wet etching method, to thus make a crystallization induced material drop down onto an amorphous silicon layer and to then use the dropped crystallization induced material as crystallization seeds.
However, the conventional amorphous semiconductor thin film crystallization method disclosed in the Korean Patent Registration No, 10-0653853, makes a direct influence upon a lower poly crystalline silicon thin film when a gas used for the dry etching method or a solution used for the wet etching method performs an etching process of removing the sacrificial organic membrane, to thereby cause a quality of a membrane between an active layer and a gate insulating layer to become uneven.
Meanwhile, in order to solve a problem of lowering characteristics the leakage current and behavior of the channel region since metal components flowing into the boundary surfaces and the channel region by the MIC phenomenon remain, an offset structure MILC crystallization method of conducting crystallization by offsetting a crystallization induced metal from the gate electrode and forming the crystallization induced metal only in the source and drain regions, has been proposed.
However, the big leakage current of the thin film transistor still exists since there exists a lot of metal silicides that are trapped in the crystalline grain, even in the case that the active layer of the channel region is crystallized by using the offset structure MILC crystallization method.